RFR: 8309258: RISC-V: Add riscv_hwprobe syscall [v2]

[Robbin Ehn]

On Wed, 14 Jun 2023 06:37:40 GMT, Thomas Stuefe <stuefe at openjdk.org> wrote:

>> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   free uarch string
>
> src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp line 90:
> 
>> 88:   assert(ext_D.feature_bit() == HWCAP_ISA_D, "Bit for D must follow Linux HWCAP");
>> 89:   assert(ext_C.feature_bit() == HWCAP_ISA_C, "Bit for C must follow Linux HWCAP");
>> 90:   assert(ext_V.feature_bit() == HWCAP_ISA_V, "Bit for V must follow Linux HWCAP");
> 
> I'm somewhat confused about the hw_cap feature bits. Kernel asm/hwcap.h seems only to define caps up to C for riscv. This code mentions (in VMVersion) Q, H, V. 
> 
> Are these future flags?
> 
> Here we don't check for Q, should we check that too?

This is a moving target more is getting added.
The basic standard ones follow this patterns.
E.g. https://lore.kernel.org/lkml/20230428190609.3239486-2-evan@rivosinc.com/

Yes Q should be added and the other ones. I'll just add Q in this change-set,

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PR Review Comment: https://git.openjdk.org/jdk/pull/14445#discussion_r1229203582