RFR: 8309258: RISC-V: Add riscv_hwprobe syscall [v2]
Robbin Ehn
rehn at openjdk.org
Wed Jun 14 14:24:13 UTC 2023
On Tue, 13 Jun 2023 14:05:51 GMT, Thomas Stuefe <stuefe at openjdk.org> wrote:
>> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
>>
>> free uarch string
>
> src/hotspot/cpu/riscv/vm_version_riscv.hpp line 47:
>
>> 45: uint64_t _feature_bit;
>> 46: bool _enabled;
>> 47: int64_t _value;
>
> all but _enabled and _value could be const, ditto the accessor routines
Fixed
> src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp line 40:
>
>> 38:
>> 39: #ifndef HWCAP_ISA_I
>> 40: #define HWCAP_ISA_I (1ULL << ('I' - 'A'))
>
> nit: use the nth_bit() macro?
Sure fixed
> src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp line 99:
>
>> 97: char buf[1024] = {};
>> 98: if (uarch != nullptr && strcmp(uarch, "") != 0) {
>> 99: snprintf(buf, sizeof(buf), "%s,", uarch);
>
> maybe assert for length < (sizeof(buf) - safety zone for the follow up strcat)
I did an alternative.
-------------
PR Review Comment: https://git.openjdk.org/jdk/pull/14445#discussion_r1229697121
PR Review Comment: https://git.openjdk.org/jdk/pull/14445#discussion_r1229697532
PR Review Comment: https://git.openjdk.org/jdk/pull/14445#discussion_r1229696890
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