RFR: 8309258: RISC-V: Add riscv_hwprobe syscall [v3]

[Robbin Ehn]

On Wed, 14 Jun 2023 14:24:06 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> Hi, please consider.
>> 
>> Linux kernel 6.4 will come with the new syscall https://docs.kernel.org/riscv/hwprobe.html to determine CPU and features.
>> RV cpus features/capabilities can vastly differ and it is not feasible for users to manually enable the correct feature set.
>> Today the VM uses the ELF aux vector and cpuinfo to gather some information about CPU capabilities.
>> 
>> Currently features are track with a bit field, this is insufficient.
>> There are many capabilities and these can have values attached to them.
>> CPU features should also be possible to turn if we can determine vendor (hwprobe).
>> 
>> This patchs adds the syscall, uses the syscall in combination with the aux and cpuinfo to enable features by default.
>> If there is a vendor specific path it calls that in addition.
>> Then we build the feature string(and bit field) and update flags accordingly.
>> 
>> Tested t1 and hwprobe with:
>> https://lore.kernel.org/qemu-devel/7f8d733df6e9b6151e9efb843d55441348805e70.camel@rivosinc.com/
>
> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
> 
>   updated after review comments

Thanks again.

I have jumped back and forth with bit number vs bit.
This should fix it, and make it more clear.

I would very much appreciate if you could retest when you got time. (only have qemu a.t.m.)

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PR Comment: https://git.openjdk.org/jdk/pull/14445#issuecomment-1592773996