RFR: 8291550: RISC-V: jdk uses misaligned memory access when AvoidUnalignedAccess enabled [v10]

Vladimir Kempik vkempik at openjdk.org
Mon May 8 13:32:40 UTC 2023


> Please review this attempt to remove misaligned loads and stores in risc-v specific part of jdk.
> 
> The patch has two main parts:
>  - opcodes loads/stores is now using put_native_uX/get_native_uX
>  - some code in template interp got changed to prevent misaligned loads
>  
> perf stat numbers for trp_lam ( misaligned loads) and trp_sam ( misaligned stores) before the patch: 
> 
>  169598      trp_lam                                          
>   13562      trp_sam  
> 
> 
> after the patch both numbers are zeroes.
> I can see template interpreter to be ~40 % faster on hifive unmatched ( 1 repetition of renaissance philosophers in -Xint mode), and the same performance ( before and after the patch) on thead rvb-ice ( which supports misaligned stores/loads in hw)
> 
> tier testing on hw is in progress

Vladimir Kempik has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains 17 commits:

 - merge
 - Add strig_equals patch to prevent misaligned access there
 - rename helper function, add assertion
 - Move misaligned lwu into macroAssembler_riscv.cpp
 - simplify sipush and branch
 - simpify branching in branch opcodes
 - Remove unused macros
 - spaces
 - fix nits
 - clean up comments
 - ... and 7 more: https://git.openjdk.org/jdk/compare/bb3e44d8...1de88ec5

-------------

Changes: https://git.openjdk.org/jdk/pull/13645/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=13645&range=09
  Stats: 201 lines in 12 files changed: 87 ins; 30 del; 84 mod
  Patch: https://git.openjdk.org/jdk/pull/13645.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13645/head:pull/13645

PR: https://git.openjdk.org/jdk/pull/13645


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