RFR: 8291550: RISC-V: jdk uses misaligned memory access when AvoidUnalignedAccess enabled [v18]

Vladimir Kempik vkempik at openjdk.org
Fri May 12 12:17:46 UTC 2023


> Please review this attempt to remove misaligned loads and stores in risc-v specific part of jdk.
> 
> The patch has two main parts:
>  - opcodes loads/stores is now using put_native_uX/get_native_uX
>  - some code in template interp got changed to prevent misaligned loads
>  
> perf stat numbers for trp_lam ( misaligned loads) and trp_sam ( misaligned stores) before the patch: 
> 
>  169598      trp_lam                                          
>   13562      trp_sam  
> 
> 
> after the patch both numbers are zeroes.
> I can see template interpreter to be ~40 % faster on hifive unmatched ( 1 repetition of renaissance philosophers in -Xint mode), and the same performance ( before and after the patch) on thead rvb-ice ( which supports misaligned stores/loads in hw)
> 
> tier testing on hw is in progress

Vladimir Kempik has updated the pull request incrementally with one additional commit since the last revision:

  Update src/hotspot/cpu/riscv/interp_masm_riscv.cpp
  
  Co-authored-by: Feilong Jiang <freedom.jfl at gmail.com>

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/13645/files
  - new: https://git.openjdk.org/jdk/pull/13645/files/129b68d6..6c09f1f7

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=13645&range=17
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=13645&range=16-17

  Stats: 4 lines in 1 file changed: 1 ins; 0 del; 3 mod
  Patch: https://git.openjdk.org/jdk/pull/13645.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13645/head:pull/13645

PR: https://git.openjdk.org/jdk/pull/13645


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