RFR: 8308076: X86_64: make rheapbase register allocatable in zero based compressedOops mode

kuaiwei duke at openjdk.org
Mon May 15 06:42:07 UTC 2023


In x86 64 mode, decode heap oop could use SIB without base if heap base is zero. like

0d1     movl    R11, [,R9 << 3 + #72] (zero base compressed oop addressing) # compressed ptr ! Field: java/lang/ClassLoader.classAssertionStatus 

So rheapbase( r12 )  can be allocated as general register.

Tier 1/2 tests are passed without new failure.

-------------

Commit messages:
 - add unit test
 - change assembler

Changes: https://git.openjdk.org/jdk/pull/13976/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=13976&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8308076
  Stats: 186 lines in 7 files changed: 106 ins; 62 del; 18 mod
  Patch: https://git.openjdk.org/jdk/pull/13976.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13976/head:pull/13976

PR: https://git.openjdk.org/jdk/pull/13976


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