RFR: 8308469: [PPC64] Implement alternative fast-locking scheme [v2]

[Martin Doerr]

> New alternative fast-locking scheme for PPC64. Mostly implemented like on other platforms.
> Differences (also explained by comments in code):
> - Not using C2HandleAnonOMOwnerStub because the C2 code is reused for native wrappers.
> - Implemented a helper function `MacroAssembler::atomically_flip_locked_state` which makes it much easier to implement fast_lock/unlock for PPC64 (mainly because of register constraints in C1).
> - Using acquire/release barriers only for locking/unlocking.
> 
> I have changed the C2 code to use ConditionRegister CR0 which fits better to the new locking code. Therefore, I have adapted the other modes to work with that, too.
> Note that we don't support RTM with new locking modes. That feature will probably get removed in a future JDK version. (Already unsupported with Power10.)

Martin Doerr has updated the pull request incrementally with one additional commit since the last revision:

  interp_masm: Rename displaced_header to header.

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Changes:
  - all: https://git.openjdk.org/jdk/pull/14069/files
  - new: https://git.openjdk.org/jdk/pull/14069/files/dca48f59..eae93f86

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=14069&range=01
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=14069&range=00-01

  Stats: 19 lines in 1 file changed: 0 ins; 0 del; 19 mod
  Patch: https://git.openjdk.org/jdk/pull/14069.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/14069/head:pull/14069

PR: https://git.openjdk.org/jdk/pull/14069