RFR: 8319716: RISC-V: Add SHA-2

[Hamlin Li]

On Wed, 8 Nov 2023 14:47:07 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

> Hi, please consider.
> 
> Main author is @luhenry, I only fixed some minor things and tested it.
> 
> Such as:
> test/hotspot/jtreg/compiler/intrinsics/sha/
> test/jdk/java/security/MessageDigest/
> test/jdk/jdk/security/
> tier1
> 
> And still running some test.

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 3917:

> 3915:     //--------------------------------------------------------------------------------
> 3916:     // Quad-round 0 (+0, v10->v11->v12->v13)
> 3917:     __ vl1re32_v(v15, consts);

Seems the round 0-11 are quite similar with each other, although with some difference in some src registers, but with similar patterns.
Would it be possible and better to group them in a loop to simplify the code? or construct some functions.

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4348:

> 4346: 
> 4347:     //--------------------------------------------------------------------------------
> 4348:     // Quad-round 0 (+0, v10->v11->v12->v13)

similar comments as generate_sha256_implCompress about group the rounds in a loop.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1388349103
PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1388352492