RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v2]

[Vladimir Kempik]

On Thu, 9 Nov 2023 15:31:02 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Olga Mikhaltsova has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fixed intrinsics implementation. Reverted changes of FCVT_SAFE.
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4263:
> 
>> 4261:   fadd_s(ftmp, src, ftmp);
>> 4262:   fcvt_w_s(dst, ftmp, RoundingMode::rdn);
>> 4263: 
> 
> This still doesn't look right to me. I urge you to test it against the Java implementation over the full 32-bit range.

I think it may start working if rounding mode for fadd_s would be changed from default rne, to rdn

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PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1388373754