RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v2]

Tue Nov 14 00:57:48 UTC 2023

On Thu, 9 Nov 2023 11:46:58 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

>> Olga Mikhaltsova has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fixed intrinsics implementation. Reverted changes of FCVT_SAFE.
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4254:
> 
>> 4252:   // dst = 0
>> 4253:   // if +/-0, +/-subnormal numbers, signaling/quiet NaN
>> 4254:   andi(tmp, tmp, 0b1100111100);
> 
> Please, update this line ( and same in doubles) for new scheme of working with fclass mask ( https://github.com/openjdk/jdk/pull/16362/files#diff-314214875276cd9a11ecdfd52b68403ded286710ba0820461b0b510506f61a33R1077 )

Fixed. Thx!

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PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1391856816