RFR: 8319801: Recursive lightweight locking: aarch64 implementation

[Andrew Haley]

On Wed, 15 Nov 2023 07:56:51 GMT, Axel Boldt-Christmas <aboldtch at openjdk.org> wrote:

> > > The aarch64 C2 port tries to avoid stronger memory semantics where ever possible. In C2 lock it first does a relaxed load of the mark word to check for inflation. Both lock and unlock uses a load/store exclusive register pair to transition the mark word.
> > 
> > 
> > It's probably not a good idea to use load/store exclusive, because recent AArch64 implementations scale very badly under contention. Better to use atomic update instructions.
> 
> We have found on some hardware the LSE instructions have terrible performance in the un-contended case.

Hmm. Which hardware is this? This is stuff I need to be aware of. Please contact me off-line if it's hard to say in public.

> When running this on hardware where LSE was not a concern we saw no detrimental effects, and on hardware where LSE had issues we saw significant gains.

This justification needs a comment in the code. Otherwise this use of non-LSE, as far as I recall the only use in the entire back end, is very surprising to the reader. At least, to this reader.

> It would be very good to know if there are hardware and program combinations for which this approach shows regressions. We have not seen this so far.
> 
> The inflated case still uses LSE. (CAS on the owner field).

I guess the real question is how far we should go to accommodate a hardware manufacturer who has messed up their implementation. But that's a question for another day; if it is clearly explained in comments in the code why we're using ldx/stx I guess we can live with it.

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PR Comment: https://git.openjdk.org/jdk/pull/16608#issuecomment-1812137090