RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v5]

[Olga Mikhaltsova]

On Tue, 14 Nov 2023 19:34:41 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Olga Mikhaltsova has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Used fclass_mask
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4263:
> 
>> 4261: 
>> 4262: void MacroAssembler::java_round_float(Register dst, FloatRegister src,
>> 4263:                                       FloatRegister ftmp, Register tmp) {
> 
> Can we remove the `tmp` parameter here, and use `t0` directly in java_round_float/double?
> As it's more clear, and in fact in round_float/double_reg it does not allocate a register indeed, and `assert_different_registers ` can be removed too.

Fixed. Thx! I'm agree, it doesn't make sense to declare `tmp` here.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1394397758