RFR: 8318217: RISC-V: C2 VectorizedHashCode [v3]

[Yuri Gaevsky]

On Fri, 17 Nov 2023 07:13:16 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Yuri Gaevsky has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Addressed most of suggestions for code improvements from @Hamlin-Li
>
> src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp line 1467:
> 
>> 1465:                                         BasicType eltype)
>> 1466: {
>> 1467:   assert_different_registers(ary, cnt, result, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6);
> 
> We have two scratch registers t0 (x5) / t1 (x6) which should be considered for use in this assembler function.
> These two are reserved from the register allocator and are suitable for keeping some short-lived values in the procedure.

Done.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16629#discussion_r1397724215