RFR: JDK-8320892: AArch64: Restore FPU control state after JNI [v2]

[Andrew Dinn]

On Tue, 28 Nov 2023 15:09:35 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Some buggy libraries corrupt the floating-point control register. Provide something similar to the x86 RestoreMXCSROnJNICalls. 
>> 
>> I realize that using the x86ish name "RestoreMXCSROnJNICalls" might be a little controversial, but it is a _global_ flag, not a CPU-specific one. And it's clearly intended for this purpose. It might have been better if that flag had been given a better name twentyish years ago, but we can't change it now.
>
> Andrew Haley has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix oop map

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 4440:

> 4438:     bfi(tmp1, zr, 22, 4); // Clear DN, FZ, and Rmode
> 4439:     bfi(tmp1, zr, 8, 5);  // Clear exception-control bits (8-12)
> 4440:     eor(tmp1, tmp1, tmp2);

Hmm? So . . .
1) We ensure tmp1 has the bits we want by clearing DN FZ Rmode and Exception bits
2) we XOR tmp1 with the original bits (saved in tmp2) and put the 'difference' in tmp1 (?)
3) If the difference is zero we skip
4) Otherwise we write tmp1 (i.e. the 'difference' bits) to fpcr (???)

Should this not be

    get_fpcr(tmp1);
    mov(tmp2, tmp1);
    bfi(tmp1, zr, 22, 4);
    bfi(tmp1, zr, 8, 5);
    eor(tmp2, tmp1, tmp2)
    cbz(tmp2, OK);
    set_fpcr(tmp1);
    bind(OK);

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PR Review Comment: https://git.openjdk.org/jdk/pull/16851#discussion_r1407922192