RFR: 8315841: RISC-V: Check for hardware TSO support

[Vladimir Kempik]

On Thu, 7 Sep 2023 09:00:50 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

> With the Ztso extension [1], some hardware will support TSO on RISC-V. That allows us to reduce the generation of memory fences, given the stronger memory model compared to RVWMO.
> 
> [1] https://github.com/riscv/riscv-isa-manual/blob/6dcbc6da9ada01f0f57da83cda6059bdec57619f/src/ztso-st-ext.adoc#L1

Hello Ludovic, will this ( and hw support for tso) help to reduce overhead from getfield IsDone ? 
it's sometimes the place where cpu spends most of time in some jmh tests:


62.78%    0x0000003fdcfb6670:   fence	ir,iorw                     ;*getfield isDone {reexecute=0 rethrow=0 return_oop=0}
                                                                      ; - org.openjdk.bench.java.lang.jmh_generated.MathBench_unsignedMultiplyHighLongLong_jmhTest::unsignedMultiplyHighLongLong_thrpt_jmhStub at 30 (line 121)

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PR Comment: https://git.openjdk.org/jdk/pull/15613#issuecomment-1709903422