Integrated: 8329641: RISC-V: Enable some tests related to SHA-2 instrinsic

[Gui Cao]

On Thu, 4 Apr 2024 04:16:27 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, I witnessed that some SHA-2 tests are skipped on RISC-V. The supportedCPUFeatures in IntrinsicPredicates.java is not correct for RISC-V, because it should depend on Zvkn extension instead of sha256/sha512.  I tested this with QEMU system running linux-6.8 kernel. I used NR_riscv_hwprobe syscall to detect if the system supports the Zvkn extension. Because support for Zvkn extension is not fully tested on real hardwares, the code for detecting and enabling Zvkn extension is not included in this PR.
> 
> The code for detecting Zvkn extension
> ``` diff
> diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
> index df4a2e347cc..ef99acbf7c5 100644
> --- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
> +++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
> @@ -178,6 +178,13 @@ void RiscvHwprobe::add_features_from_query_result() {
>    if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZFH)) {
>      VM_Version::ext_Zfh.enable_feature();
>    }
> +  if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVKNED)
> +      && is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVKNHB)
> +      && is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVKB)
> +      && is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVKT)) {
> +    VM_Version::ext_Zvkn.enable_feature();
> +  }
>    if (is_valid(RISCV_HWPROBE_KEY_CPUPERF_0)) {
>      VM_Version::unaligned_access.enable_feature(
>         query[RISCV_HWPROBE_KEY_CPUPERF_0].value & RISCV_HWPROBE_MISALIGNED_MASK);
> 
> 
> This IntrinsicPredicates.java CPU matching change should only affect test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHA256IntrinsicsOptionOnSupportedCPU. java, test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHA512IntrinsicsOptionOnSupportedCPU.java test case. Before this patch they are skipped, after this patch they can be selected and pass normally.
> 
> We can test test/lib-test/jdk/test/whitebox/CPUInfoTest.java to see the actual CPU Features. 
> 
> ----------configuration:(0/0)----------
> ----------System.out:(4/178)----------
> WB.getCPUFeatures(): "rv64 i m a f d c v zba zbb zbs zvkn"
> CPUInfo.getAdditionalCPUInfo(): ""
> CPUInfo.getFeatures(): [rv64, i, m, a, f, d, c, v, zba, zbb, zbs, zvkn]
> TEST PASSED
> ----------System.err:(2/88)----------
> 
> 
> ### Testing
> - [x] Run tier1-3, hotspot:tier4 tests on SOPHON SG2042 (release)
> - [ ] Run tier1-3 tests on ubuntu24(kernel version 6.8 and use qemu-system to boot ubuntu) (release)

This pull request has now been integrated.

Changeset: 3a3b77dd
Author:    Gui Cao <gcao at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/3a3b77dd4f522e2ca855acca8516e5901c3f2b5a
Stats:     3 lines in 2 files changed: 1 ins; 0 del; 2 mod

8329641: RISC-V: Enable some tests related to SHA-2 instrinsic

Reviewed-by: fyang, rehn

-------------

PR: https://git.openjdk.org/jdk/pull/18611