RFR: 8325821: [REDO] use "dmb.ishst+dmb.ishld" for release barrier [v3]

[kuaiwei]

On Tue, 9 Apr 2024 07:20:28 GMT, Andrew Haley <aph at openjdk.org> wrote:

> > > That doesn't look bad. I've made a bunch of simplifications for you to see: have a look. In general, pointer chasing is bad, so it's worth getting rid of indirections that don't help. [foo.zip](https://github.com/openjdk/jdk/files/14908996/foo.zip)
> > 
> > 
> > Thanks for your enhancement. I found you removed MergeableInst. My idea is the finite state machine could support both dmb and ld/st instructions. I created another task to merge more instruction like 'ldrs/ldrd/strs/strd ...' . https://bugs.openjdk.org/browse/JDK-8329901 . The old implementation is not suitable to support new instruction. I need duplicate to support other register type like float register. So I want to use MergeableInst to extract instruction information. Such as target register, base register, offseet ... . It's my draft plan, how do you think about it?
> 
> I think you may have scaling problems with this. If you try to handle multiple kinds of instructions in a single state machine, it is likely to explode in size, and be (even more) confusing to the reader.

I'm fine with it. So the state machine is only used for dmb. We can figure out how to simplify other instructions later.
About CodeBuffer::offset(), does you mean Assembler::offset() ? It worth a try, we may remove the 'const' from its definition and its derived methods.

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PR Comment: https://git.openjdk.org/jdk/pull/18467#issuecomment-2044340305