RFR: 8330156: RISC-V: Range check auipc + signed 12 imm instruction

[Robbin Ehn]

On Fri, 12 Apr 2024 12:52:12 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hi please consider!
>> 
>> Today we check if the distance is a signed 32.
>> As the second instruction have sign bit + 11 bits the, max of such pair is shorter.
>> 
>> Sanity tested
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 684:
> 
>> 682:     int64_t twoG = (2 * G);
>> 683:     int64_t twoK = (2 * K);
>> 684:     return x <= (twoG - twoK) && x >= (-twoG + twoK);
> 
> As I remembered, the true range of RISC-V PC-relative addressing should be: [-2^31 - 2^11, 2^31 - 2^11). See [1].
> 
> [1] https://patchwork.kernel.org/project/linux-riscv/patch/20220131182145.236005-3-kernel@esmil.dk/

Ah, yes, thanks. I missed flipping sign and was thinking in semi-32-bit.
So the maximum auipc is 0x80..0 which is -2^31, if we subtract form this we would overflow on 32-bit.
But since we are subtracting from 64-bit register reach is actually larger than min int32.

I'll fix!

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PR Review Comment: https://git.openjdk.org/jdk/pull/18755#discussion_r1562614201