RFR: 8314124: RISC-V: implement Base64 intrinsic - decoding [v6]

[Hamlin Li]

On Tue, 27 Aug 2024 14:49:02 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   comments
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 5363:
> 
>> 5361:     Label NoFailure;
>> 5362:     __ beq(failedIdx, minusOne, NoFailure);
>> 5363:     __ vsetvli(x0, failedIdx, Assembler::e8, lmul, Assembler::mu, Assembler::tu);
> 
> Is it necessary to switch to `Assembler::mu, Assembler::tu` for the second vsetvli? Seems that we could still use `Assembler::ma, Assembler::ta` as the first vsetvli.

(Although the jtreg test shows no difference between mu/tu and ma/ta.)
Yes, I think it's safe to use mu/tu here, in particular it's for the code `__ vsseg3e8_v(outputV1, dst);`. Because seems to me, by spec if we use ma/ta, an implementation could touch dst data after the fail index, which is not expected.
And if the code go through this path, it's the end of loop, so impact of performance is just for the last round when there is error in input data.

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PR Review Comment: https://git.openjdk.org/jdk/pull/20026#discussion_r1733178202