RFR: 8322179: RISC-V: Implement SHA-1 intrinsic [v7]

[Hamlin Li]

On Thu, 1 Feb 2024 06:07:50 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   revert string change
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 5047:
> 
>> 5045:       __ add(limit, limit, buf);
>> 5046:       __ sub(src, buf, offset);
>> 5047:     }
> 
> It seems quite tricky and not that readable to let `src` alias `offset`. Could this be simplified by making use of the `x9` register? This is a callee-saved register which I think is not used.

Thanks, updated.

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PR Review Comment: https://git.openjdk.org/jdk/pull/17130#discussion_r1474370800