RFR: 8324874: AArch64: crypto pmull based CRC32/CRC32C intrinsics clobber V8-V15 registers [v2]

[Evgeny Astigeevich]

On Sun, 4 Feb 2024 20:30:26 GMT, Evgeny Astigeevich <eastigeevich at openjdk.org> wrote:

>> [JDK-8302113](https://bugs.openjdk.org/browse/JDK-8302113) and [JDK-8302783](https://bugs.openjdk.org/browse/JDK-8302783) enhanced CRC32/CRC32C intrinsics with crypto pmull which is enabled for Neoverse V1 and V2. The intrinsics use `kernel_crc32_common_fold_using_crypto_pmull` which uses v8-v15 registers and potentially clobbers them if they are not saved before CRC32/CRC32C intrinsics are called.
>> 
>> According to the latest “ABI for the Arm 64-bit Architecture with SVE support”: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
>> 
>> 
>> Registers v8-v15 must be preserved by a callee across subroutine calls;
>> the remaining registers (v0-v7, v16-v31) do not need to be preserved
>> (or should be preserved by the caller).
>> 
>> 
>> This PR reallocates registers to avoid v8-v15 registers:
>> - v0-v7 are used for data.
>> - v16-v32 are tmp registers.
>> 
>> Regression tests are added.
>> Tested a fastdebug build on Graviton 3:
>> - `gtest`: Passed
>> - `tier1..tier3`: Passed
>
> Evgeny Astigeevich has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix code comments

@theRealAph @nick-arm  Could you please review the PR?

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PR Comment: https://git.openjdk.org/jdk/pull/17701#issuecomment-1925906527