RFR: 8324124: RISC-V: implement _vectorizedMismatch intrinsic

[Yuri Gaevsky]

On Tue, 20 Feb 2024 14:07:04 GMT, Yuri Gaevsky <duke at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4256:
>> 
>>> 4254: 
>>> 4255:   bind(VEC_LOOP);
>>> 4256:   vsetvli(t0, cnt, Assembler::e8, Assembler::m8);
>> 
>> I see `e8` element size is always used here for all cases. Maybe we could make use of some larger element size (according to `log2_array_indxscale` input) to improve the code? Especiall, the part for handling `idx`.
>
> The ```e8``` is used here to avoid "unaligned-access-penalties" because:
> (a)
> [jdk.internal.util.ArraysSupport::vectorizedMismatch()](https://github.com/openjdk/jdk/blob/master/src/java.base/share/classes/jdk/internal/util/ArraysSupport.java#L92) doesn't require that the given arrays are aligned to the size of array elements:
> 
>      * <p>The given offsets, in bytes, need not be aligned according to the
>      * given log<sub>2</sub> size the array elements.  More specifically, an
>      * offset modulus the size need not be zero.
> 
> and
> (b) RVV specification states:
> 
> 8. Vector Memory Alignment Constraints
> ...
> If an element accessed by a vector memory instruction is not naturally aligned to the size of the element, either the element
> is transferred successfully or an address misaligned exception is raised on that element.

Please also notice that the method's java code also use `Unsafe::getLongUnaligned/getIntUnaligned` for accesses.

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PR Review Comment: https://git.openjdk.org/jdk/pull/17750#discussion_r1495886712