RFR: 8324186: Use "dmb.ishst+dmb.ishld" for release barrier [v4]

[kuaiwei]

On Mon, 29 Jan 2024 02:11:43 GMT, kuaiwei <duke at openjdk.org> wrote:

>>> > I wonder if this was tested on other vendors' hardware? I witnessed some negative impact at least on HiSilicon TSV110 running the same JMH. So I guess it might be safer to go as a vendor-specific change.
>>> 
>>> I tried a number of different machines and saw regressions only on Kunpeng-920 (same CPU?) and A57 which is quite niche at this point.
>> 
>> Right, so it's probably a low-end, mostly-in-order thing. That makes sense because we're trading a weaker barrier for more instructions, and perhaps some cores implement barriers in a crude one-size-fits-all way.
>
> @theRealAph @RealFYang Could you help to sponsor it? Thanks

> This introduced a performance regression, see [JDK-8325449](https://bugs.openjdk.org/browse/JDK-8325449) and [JDK-8325269](https://bugs.openjdk.org/browse/JDK-8325269). @kuaiwei, could you please have a look?

I missed the message. I will look these issues.

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PR Comment: https://git.openjdk.org/jdk/pull/17511#issuecomment-1956125733