RFR: 8319716: RISC-V: Add SHA-2 [v12]

[Robbin Ehn]

On Mon, 8 Jan 2024 07:00:49 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Robbin Ehn has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains 21 additional commits since the last revision:
>> 
>>  - Merge branch 'master' into sha256
>>  - Fixed comment
>>  - Fixed flags
>>  - Fixed vlen 128
>>  - Merge branch 'master' into sha256
>>  - fixed lmul
>>  - remove merge, renames
>>  - Easier reg layout and 128/m2
>>  - Minor update
>>  - index store state back
>>  - ... and 11 more: https://git.openjdk.org/jdk/compare/dfc5673d...2442b9c6
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4029:
> 
>> 4027:       if (multi_block) {
>> 4028:         int total_adds = vset_sew == Assembler::e32 ? 240 : 608;
>> 4029:         __ addi(consts, consts, -total_adds);
> 
> Maybe leave a TODO about future investigation of preloading of constants in vector registers for SHA256?

It's recorded here: https://bugs.openjdk.org/browse/JDK-8322177
Note that we can preload SHA512 for vlen 256, requires 20 vregs, also.

> src/hotspot/cpu/riscv/vm_version_riscv.cpp line 269:
> 
>> 267:       FLAG_SET_DEFAULT(UseChaCha20Intrinsics, true);
>> 268:     }
>> 269:   } if (UseChaCha20Intrinsics) {
> 
> What's the purpose of this change?

Accidental, fixed.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1444237280
PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1444236670