RFR: 8319801: Recursive lightweight locking: aarch64 implementation [v10]

[Axel Boldt-Christmas]

On Thu, 25 Jan 2024 13:08:28 GMT, Roman Kennke <rkennke at openjdk.org> wrote:

>> Axel Boldt-Christmas has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Drop memory order comments
>
> src/hotspot/cpu/aarch64/aarch64.ad line 16477:
> 
>> 16475:   predicate(LockingMode == LM_LIGHTWEIGHT);
>> 16476:   match(Set cr (FastLock object box));
>> 16477:   effect(TEMP tmp, TEMP tmp2);
> 
> I believe you should declare box as TEMP here, because that is how it is used. It probably works by accident because box is only used by us and has no meaning outside of the locking code. Also, I think there is no need to match the box register to the 2nd FastLock input. If you change that, you might need to add a match_edge() in FastLockNode and FastUnlockNode in locknode.hpp that excludes the box argument when LW locking is on. I believe the purpuse of the box node/register is to track the stack-location of the stack-lock in stack-locking, and ensure that unlock is getting the same location there as the corresponding lock.
> Thinking about this... this should be done as a follow-up or else it becomes too intrusive for this change.

That was what I started doing and came to the same conclusion.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16608#discussion_r1466369765