RFR: 8329032: C2 compiler register allocation support for APX EGPRs

[Vladimir Kozlov]

On Wed, 1 May 2024 18:42:13 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

> Intel® Advanced Performance Extensions (Intel® APX) adds 16 new 64 bit general purpose register also known as Extended General Purpose Registers in IA-32e 64 bit mode.
> 
> This initial patch adds following support:-
> 1) C2 compiler register allocation support.
> 2) State save restoration while transitioning from C2 JIT compiled code to runtime services.
> 3) Applicable extensions to native interface used by runtime for patching instruction.
> 
> We plan to address C1 register support in subsequent patch as there are hard upper bound allocation limits
> (currently set to r11) imposed by existing implementation of linear scan algorithm after which it reserves
> remaining register for special purpose.
> 
> Patch has been regressed over stand alone test points after merging with other APX support patches [1][2] under review.
> 
> We plan to do thorough validation using [Intel's SDE](https://www.intel.com/content/www/us/en/download/684897/intel-software-development-emulator.html) during course of time and release incremental patches for bug fixes
> found during testing.
> 
> [1] https://github.com/openjdk/jdk/pull/18476
> [2] https://github.com/openjdk/jdk/pull/18562
> 
> PS: Intent of this draft PR is to facilitate validation of existing APX related PRs under review.

src/hotspot/cpu/x86/register_x86.hpp line 85:

> 83:     if (UseAPX) {
> 84:       return number_of_registers / 2;
> 85:     }

Should check be reversed `!UseAPX`?

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PR Review Comment: https://git.openjdk.org/jdk/pull/19042#discussion_r1631351591