RFR: 8320995: RISC-V: C2 PopCountVI [v3]

[Hamlin Li]

On Tue, 7 May 2024 14:19:10 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   mark UseZvbb experimenal
>
> src/hotspot/cpu/riscv/riscv_v.ad line 3795:
> 
>> 3793: instruct vpopcount_mask(vReg dst_src, vRegMask_V0 v0) %{
>> 3794:   match(Set dst_src (PopCountVI dst_src v0));
>> 3795:   match(Set dst_src (PopCountVL dst_src v0));
> 
> Is there a reason to force input & output being the same vector register?

Seems not, I modify it to usual pattern.

> src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp line 180:
> 
>> 178:   if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVBB)) {
>> 179:     VM_Version::ext_Zvbb.enable_feature();
>> 180:   }
> 
> I don't think it's appropriate to auto-enable an experimental extension.

Thanks for catching, fixed.

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PR Review Comment: https://git.openjdk.org/jdk/pull/19065#discussion_r1592724179
PR Review Comment: https://git.openjdk.org/jdk/pull/19065#discussion_r1592724503