RFR: 8332265: RISC-V: Materialize pointers faster by using a temp register [v2]

[Ludovic Henry]

On Mon, 20 May 2024 13:15:15 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> Hi, please consider!
>> 
>> Materializing a 48-bit pointer, using an additional register, we can do with:
>> lui + lui + slli + add + addi
>> This 15% faster both on VF2 and in CPU models, compared to movptr().
>> 
>> As we often materialize during calls there is free registers.
>> 
>> I have choose just a few spot to use it, many more can use.
>> E.g. la() with tmp register can use li48 instead of movptr.
>> 
>> Running tests now (so far so good), as if I screwed up IC calls it should be seen fast.
>> And benchmarks when hardware is free.
>
> Robbin Ehn has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains three additional commits since the last revision:
> 
>  - li48 -> movptr
>  - Merge branch 'master' into 8332265
>  - li48

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 1603:

> 1601:   } else if (NativeInstruction::is_li32_at(insn_addr)) {             // li32
> 1602:     return get_target_of_li32(insn_addr);
> 1603:   } else if (NativeInstruction::is_movptr2_at(insn_addr)) {          // movptr2

You could move that `else if` block right under the `NativeInstruction::is_movptr1_at` one.

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PR Review Comment: https://git.openjdk.org/jdk/pull/19246#discussion_r1607823211