RFR: 8343827: RISC-V: set AlignVector as false if applicable to enable SLP

[Vladimir Kempik]

On Fri, 8 Nov 2024 11:40:46 GMT, Hamlin Li <mli at openjdk.org> wrote:

> Hi,
> Can you help to review this patch?
> 
> SLP vectorization in C2 checks the data alignment optionally, if fast misaliged access is supported by CPU it will skip the alignment check in SLP, this is good for both C2 compile time and run time (as more loops can be potentially vectorized. And the performance of vector implementation is good enough, which was already verified by existing tests (array copy, crc32, ...)).
> On the other hand, we have some existing tests which verify that generated IRs should contain some specific Nodes, with the intrdocution of Compact Object Header, some tests related to SLP was observed failure which is due to the data offset change which is due to header change in the JEP, by enabling C2 SLP when fast misaliged access is supported, we should be able to resolve these issues. Although riscv support misaligned access optionally, started from RVA22 it's mandatory.
> 
> Thanks!

hello Hamlin, this could to be wrong.
for example: kendryte 230 with c908 core with rv64gcv 
it has fast misaligned access but only for scalars(rv64gc), not for vectors(rvv)
i dont know if it's just a corner case or a possible common practice in future.

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PR Comment: https://git.openjdk.org/jdk/pull/21974#issuecomment-2468288871