RFR: 8343827: RISC-V: set AlignVector as false if applicable to enable SLP [v2]

[Hamlin Li]

> Hi,
> Can you help to review this patch?
> 
> SLP vectorization in C2 checks the data alignment optionally, if fast misaliged access is supported by CPU it will skip the alignment check in SLP, this is good for both C2 compile time and run time (as more loops can be potentially vectorized. And the performance of vector implementation is good enough, which was already verified by existing tests (array copy, crc32, ...)).
> On the other hand, we have some existing tests which verify that generated IRs should contain some specific Nodes, with the intrdocution of Compact Object Header, some tests related to SLP was observed failure which is due to the data offset change which is due to header change in the JEP, by enabling C2 SLP when fast misaliged access is supported, we should be able to resolve these issues. Although riscv support misaligned access optionally, started from RVA22 it's mandatory.
> 
> Thanks!

Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:

  refine code

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/21974/files
  - new: https://git.openjdk.org/jdk/pull/21974/files/696972ec..f13c006c

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=21974&range=01
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=21974&range=00-01

  Stats: 1 line in 1 file changed: 0 ins; 0 del; 1 mod
  Patch: https://git.openjdk.org/jdk/pull/21974.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/21974/head:pull/21974

PR: https://git.openjdk.org/jdk/pull/21974