RFR: 8339983: [s390x] secondary_super_cache does not scale well: C1 and interpreter [v2]

[Andrew Haley]

On Mon, 25 Nov 2024 12:59:10 GMT, Amit Kumar <amitkumar at openjdk.org> wrote:

>> s390x Port for : [JDK-8331341](https://bugs.openjdk.org/browse/JDK-8331341)
>> 
>> Tier1 test: 
>> 1. `-XX:+UseSecondarySupersTable  -XX:+VerifySecondarySupers -XX:+VerifySecondarySupers -XX:-UseSecondarySupersCache`
>> 2.  No flag turn on. i.e. used `UseSecondarySupersCache` by default. 
>> 3. `-XX:+UseSecondarySupersTable  -XX:+VerifySecondarySupers -XX:+VerifySecondarySupers -XX:-UseSecondarySupersCache` with C1 compiler
>
> Amit Kumar has updated the pull request incrementally with one additional commit since the last revision:
> 
>   suggestion from Andrew

src/hotspot/cpu/s390/macroAssembler_s390.cpp line 3432:

> 3430:     r_array_index = temp3,
> 3431:     slot          = temp4, // NOTE: "slot" can't be Z_R0 otherwise z_sllg and z_rllg instructions below will mess up!!!!
> 3432:     r_bitmap      = Z_R1_scratch;

Why is `r_bitmap` a fixed register?
Do you push `Z_R1` somewhere?

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PR Review Comment: https://git.openjdk.org/jdk/pull/22341#discussion_r1856840405