RFR: 8344306: RISC-V: Add zicond

[Robbin Ehn]

On Tue, 26 Nov 2024 09:00:34 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

> Hi, please consider.
> 
> In cpu models we save ~1 cycle per removed branch.
> This patch removes ~0.1% of branches in generic C2 generated code.
> We should probably investigate if we can improve/add peephole optimization to remove more branches.
> 
> As the C1 cmov code is a bit tricky I left that as a followup.
> 
> I added gtests for the cmovs.
> (we should add coverage for more of masm in this gtest suit)
> Pro tip, invoke the gtestLauncher directly (you only need to build exploded):
> `gtestLauncher -jdk build/linux-riscv64-server-fastdebug/jdk/ --gtest_break_on_failure --gtest_filter="*RiscV*" -XX:+UnlockDiagnosticVMOptions -XX:+UseZicond -XX:ParallelGCThreads=1 -XX:ConcGCThreads=1 -XX:CICompilerCount=2`
> 
> Tested on Spacemit X60, gtests and tier1.
> 
> Thanks, Robbin

> Hi, thanks for this work! I once tried to find this extension but I think I missed it :-) Seems that we need two special AD match rules to catch `eq`/`ne` zero cases could be further optimized. (Say, we use `t0` for `rtmp` in this code sequence)
> 
> ```
> Conditional select, if zero
>  rd = (rc == 0) ? rs1 : rs2
> =>
>  czero.nez  rd, rs1, rc
>  czero.eqz  rtmp, rs2, rc
>  or         rd, rd, rtmp
> ```
> 
> ```
> Conditional select, if non-zero
>  rd = (rc != 0) ? rs1 : rs2
> =>
> czero.eqz  rd, rs1, rc
> czero.nez  rtmp, rs2, rc
> or         rd, rd, rtmp
> ```

Thanks! Yes we should look into that.

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PR Comment: https://git.openjdk.org/jdk/pull/22386#issuecomment-2503110245