RFR: 8339983: [s390x] secondary_super_cache does not scale well: C1 and interpreter [v2]

[Lutz Schmidt]

On Wed, 27 Nov 2024 12:22:39 GMT, Amit Kumar <amitkumar at openjdk.org> wrote:

>>> Also, between this instruction and the branch instruction, we are emitting `z_lg` and `z_lghi` instruction. So maybe just put a comment ?
>> 
>> Yes, do that. I notice we do the same on AArch64, but I sort-of "know" that `macroAssembler::pop` preserves flags on aarch64 and x86.
>
> already updated :)
> 
> for s390x, `pop_frame()` doesn't interfere with `cc` as it only uses `lg` instruction which doesn't change `cc`. But `push_frame()` can change `cc` as it uses `aghi` instruction to perform add operation.

> But we can store the value in scratch register, maybe `Z_R0` and then move this check.

Using a scratch register is just as opaque. You implicitly rely on the code in between to do no harm. For me, a comment helps to create awareness - if anyone reads it.

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PR Review Comment: https://git.openjdk.org/jdk/pull/22341#discussion_r1860891564