RFR: 8345236: RISC-V: Remove revb_h_h_u and revb_h_w_u macro assembler routines

[Fei Yang]

Hi, please consider this cleanup change.

This is a further step after https://bugs.openjdk.org/browse/JDK-8345110.
`revb_h_h_u` and `revb_h_w_u` assembler routines are mainly used to change byte-ordering for one halfword or two halfwords.
The names don't look obvious and the callsites emit more instructions when Zbb is not available (6 and 14 instructions respectively).

Seems more readable if we do the ordering while loading the bytes for these callsites, which also results in less instructions. Similar approach is taken for other places in riscv and other ports like arm. This also renames `revb_w` into `revbw` so that we are more consistent in naming with integer instructions that manipulate 32-bit values like `addiw`.

Testing on linux-riscv64 platform.
- [ ] tier1 (release)

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Commit messages:
 - 8345236: RISC-V: Remove revb_h_h_u and revb_h_w_u macro assembler routines

Changes: https://git.openjdk.org/jdk/pull/22452/files
  Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=22452&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8345236
  Stats: 80 lines in 3 files changed: 14 ins; 38 del; 28 mod
  Patch: https://git.openjdk.org/jdk/pull/22452.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/22452/head:pull/22452

PR: https://git.openjdk.org/jdk/pull/22452