RFR: 8341194: [REDO] Implement C2 VectorizedHashCode on AArch64

[Andrew Haley]

On Tue, 1 Oct 2024 12:48:21 GMT, Mikhail Ablakatov <duke at openjdk.org> wrote:

> Fix and redo [JDK-8322770](https://bugs.openjdk.org/browse/JDK-8322770) which got backed out in [JDK-8341197](https://bugs.openjdk.org/browse/JDK-8341197) due to test failures / jlink failure. Initial PR: https://github.com/openjdk/jdk/pull/18487.
> 
> Compared to the initial PR, this one eliminates a mismatch between the `arrays_hashcode()` template and stub. The template defined v0-v7 & v12-v17 as TEMP  registers but the stub used v8-v9 which were not on the list. Changing v8-v9 in the stub to v12-v13 eliminates this mismatch. Other changes in aarch64.ad  is just a cleanup as some registers on the list were not used by the stub at all anymore.
> 
> Following the discussion on [JDK-8341197](https://bugs.openjdk.org/browse/JDK-8341197), we've added a `make bootcycle-images` step to our local CI pipeline to verify that the issue is fixed.

src/hotspot/cpu/aarch64/aarch64.ad line 16575:

> 16573:                          vRegD_V0 vtmp0, vRegD_V1 vtmp1, vRegD_V2 vtmp2, vRegD_V3 vtmp3,
> 16574:                          vRegD_V4 vtmp4, vRegD_V5 vtmp5, vRegD_V6 vtmp6, vRegD_V7 vtmp7,
> 16575:                          vRegD_V12 vtmp8, vRegD_V13 vtmp9, rFlagsReg cr)

It would be much better to pass all the vtemp registers to the `arrays_hashcode()`, then assert the registers are correct.

See `LOOKUP_SECONDARY_SUPERS_TABLE_REGISTERS` in `MacroAssembler`. It is asserted in the stub and in the inlined code. If this had been done in the patch that had to be backed out, it wouldn't have had to be backed out.

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PR Review Comment: https://git.openjdk.org/jdk/pull/21286#discussion_r1790587005