RFR: 8340241: RISC-V: Returns mispredicted [v4]

[Robbin Ehn]

On Fri, 11 Oct 2024 07:57:08 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Use x9, comment update
>
> src/hotspot/cpu/riscv/c1_CodeStubs_riscv.cpp line 97:
> 
>> 95:   // t0 and t1 are used as args in generate_exception_throw，
>> 96:   // so use x18 as the tmp register for rt_call.
>> 97:   __ rt_call(Runtime1::entry_for(stub_id), x18);
> 
> Can we use `x9` instead here? It's the first callee-save register in numbering.

Fixed

> src/hotspot/cpu/riscv/templateTable_riscv.cpp line 722:
> 
>> 720:   __ mv(x13, array);
>> 721:   __ mv(t1, Interpreter::_throw_ArrayIndexOutOfBoundsException_entry);
>> 722:   __ jr(t1);
> 
> Please also update preceding code comment: `// destroys x11, t0, t1`

Fixed

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/21406#discussion_r1799254007
PR Review Comment: https://git.openjdk.org/jdk/pull/21406#discussion_r1799254177