RFR: 8341527: AVX-512 intrinsic for SHA3 [v4]

[Sandhya Viswanathan]

On Wed, 16 Oct 2024 15:31:35 GMT, Ferenc Rakoczi <duke at openjdk.org> wrote:

>> src/hotspot/cpu/x86/assembler_x86.cpp line 8581:
>> 
>>> 8579:   assert(vector_len == AVX_128bit ? VM_Version::supports_avx() :
>>> 8580:         (vector_len == AVX_256bit ? VM_Version::supports_avx2() : VM_Version::supports_evex()), "");
>>> 8581:   // TODO check what legacy_mode needs to be set to
>> 
>> Drive-by comment: There's a TODO left in here.
>
> Actually, I was hoping that I would learn that from a reviewer @vpaprotsk or @vnkozlov , do you know? I was not able to figure it out from the manual what it should be. (with the current setting "false" at least my code works on the test machines that I tried, but I never tried with "true")

legacy_mode should be false here. This instruction is promotable to evex encoding if higher bank registers (XMM16 and above) are used. It is not a legacy instruction so legacy_mode should be false. Examples of legacy instructions are vptest, vpblend*.

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PR Review Comment: https://git.openjdk.org/jdk/pull/21352#discussion_r1803821984