RFR: 8339738: RISC-V: Vectorize crc32 intrinsic [v8]

[Hamlin Li]

On Tue, 17 Sep 2024 06:10:26 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   minors
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 1476:
> 
>> 1474: 
>> 1475:     add(tableN16, table3, 1*single_table_size*sizeof(juint), tmp1);
>> 1476:     mv(t0, 0xff);
> 
> Thanks for the quick update. But I am a bit worried about keeping a long-lived value in 't0'. `t0` as a scratch register is implicitly used by various assembler routines, so I think it's error-prone to do this. Can you choose another one? Seems `tmp5` or `tmp6`  in `kernel_crc32` are usable for our purpose.

Make sense, fixed. Thanks!

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PR Review Comment: https://git.openjdk.org/jdk/pull/20910#discussion_r1762522438