RFR: 8322770: Implement C2 VectorizedHashCode on AArch64 [v9]

[Mikhail Ablakatov]

On Wed, 18 Sep 2024 13:18:41 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> The current implementation reflects that the decision to process a register by halves depends on the arrangement used. In the previous version of this PR, we tested for `load_arrangement` in places where `multiply_by_halves` is tested now. This way, for example, changing the arrangement for `T_CHAR`/`T_SHORT` from `T8H` to `T4H` requires only changing the arrangement itself. Using the logic you suggest would require one to be aware of the connection between `load_arrangement` and `multiply_by_halves` that must be maintained. Therefore, I recommend leaving the code as it is.
>
> No, because the connection between load_arrangement and multiply_by_halves is inherent in the logic. Please keep things as simple as possible for this implementation. If a future engineer decides to extend this code they'll probably do something different. Speculating here about what might happen is over-engineering.

Fixed by https://github.com/openjdk/jdk/pull/18487/commits/a824a74263ce9309fca50a90b3d0f09e9b56a5c4 , please check.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18487#discussion_r1766998230