On Fri, 19 Jul 2024 17:32:09 GMT, Suchismith Roy <sroy at openjdk.org> wrote:
> JBS Issue: [JDK-8331859](https://bugs.openjdk.org/browse/JDK-8331859)
> Linux PPC64le requires Power8 since the beginning.
> AIX requires Power8 with the new OpenXL based build ([JDK-8307520](https://bugs.openjdk.org/browse/JDK-8307520)). The old build has been removed in JDK 23 ([JDK-8327701](https://bugs.openjdk.org/browse/JDK-8327701)).
> Linux PPC64 Big Endian is no longer officially supported (only kept alive for development, debugging and testing purposes).
>
> The following checks for old processors are no longer needed:
> 8: VM_Version::has_lqarx()
> 7: VM_Version::has_popcntw()
> 6: VM_Version::has_cmpb()
> 5: VM_Version::has_popcntb()
> These ones and some more checks for old instructions are no longer needed. All code which is no longer reachable when removing them should also get removed.
> Checks like "PowerArchitecturePPC64 >= 8" (or older) can be removed.
>
> Atomic::PlatformCmpxchg<1>::operator() can be simplified by using sub-word instructions (lharx, lbarx).
>
> Temp registers can be removed from cmpxchgb and cmpxchgh.
>
> Build flags "-mcpu=powerpc64 -mtune=power5" for Big Endian linux should get replaced by "-mcpu=power8 -mtune=power8" as already used for linux PPC64le.
make/autoconf/flags-cflags.m4 line 718:
> 716: # -mminimal-toc fixes `relocation truncated to fit' error for gcc 4.1.
> 717: # Use ppc64 instructions, but schedule for power5
> 718: $1_CFLAGS_CPU="-mcpu=powerpc64 -mtune=power8"
-mcpu=power8 is missing.
src/hotspot/cpu/ppc/macroAssembler_ppc.cpp line 1586:
> 1584: // emulate the sub-word instructions by constructing a 4-byte value
> 1585: // that leaves the other bytes unchanged.
> 1586: const int instruction_type = size;
I think it would be better to remove instruction_type and replace the remaining usages.
src/hotspot/cpu/ppc/macroAssembler_ppc.cpp line 1658:
> 1656: void MacroAssembler::cmpxchg_loop_body(ConditionRegister flag, Register dest_current_value,
> 1657: RegisterOrConstant compare_value, Register exchange_value,
> 1658: Register addr_base, Label &retry, Label &failed, bool cmpxchgx_hint, int size) {
Please restore indentation.
src/hotspot/cpu/ppc/macroAssembler_ppc.cpp line 1663:
> 1661: // emulate the sub-word instructions by constructing a 4-byte value
> 1662: // that leaves the other bytes unchanged.
> 1663: const int instruction_type = size;
Same here.
src/hotspot/cpu/ppc/vm_version_ppc.cpp line 99:
> 97:
> 98: if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
> 99: FLAG_SET_ERGO(UsePopCountInstruction, true);
Indentation should be adapted. Or even better set the default in globals_ppc.hpp to true and simplify this logic.
src/hotspot/cpu/ppc/vm_version_ppc.cpp line 107:
> 105:
> 106: if (FLAG_IS_DEFAULT(SuperwordUseVSX)) {
> 107: FLAG_SET_ERGO(SuperwordUseVSX, true);
Same here.
src/hotspot/cpu/ppc/vm_version_ppc.hpp line 113:
> 111: static bool has_fcfids() { return (_features & fcfids_m) != 0; }
> 112: static bool has_vand() { return (_features & vand_m) != 0; }
> 113: static bool has_lqarx() { return (_features & lqarx_m) != 0; }
Why are the other Power7 and older instruction checks not removed?
src/hotspot/os_cpu/linux_ppc/atomic_linux_ppc.hpp line 255:
> 253: /* atomic loop */
> 254: "1: \n"
> 255: " lbarx %[old_value], 0, %[dest] \n"
Please adapt the indentation of the modified lines.
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PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025531994
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025542835
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025533312
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025545860
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025550882
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025554086
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025558380
PR Review Comment: https://git.openjdk.org/jdk/pull/20262#discussion_r2025555814