RFR: 8353572: x86: AMD platforms miss the check for CLWB feature flag

[Aleksey Shipilev]

On Thu, 3 Apr 2025 20:00:05 GMT, Vladimir Ivanov <vlivanov at openjdk.org> wrote:

>> Noticed this when doing [JDK-8353558](https://bugs.openjdk.org/browse/JDK-8353558). We only check for CLWB feature flag for Intel platforms. But AMD APM (Rev. 3.36—March 2024) tells me there is a CLWB flag in CPUID Fn0000_0007_EBX_x0 leaf as well. It is in the same place as the flag for Intel.
>> 
>> Additional testing:
>>  - [x] Ad-hoc tests on Ryzen 5950X
>
> src/hotspot/cpu/x86/vm_version_x86.cpp line 3100:
> 
>> 3098:     if (ext_cpuid1_ecx.bits.sse4a != 0)
>> 3099:       result |= CPU_SSE4A;
>> 3100:     if (sef_cpuid7_ebx.bits.clwb != 0)
> 
> I'm curious what's the rule here when it comes to vendor-specific features? 
> 
> From what I'm seeing in the sources, both AMD and ZX enumerate only `ext_cpuid1` features while for Intel it's a mix of `sef_cpuid7` and `ext_cpuid1`.
> 
> So, I'm curious whether the code should be moved up and shared for all CPUs.

I believe we are being very conservative here. CPUID info is very vendor-specific, so we only trust the bits when the relevant vendor docs tell us it is trustworthy. For AMD, I can see the exact spec in AMD Programmer Manual that makes me trust the bit. I have no information if ZX can be trusted to have the same bit at the same location. And, I have no way to test it :) 

So this CPUID-bit checking should be in AMD-specific block.

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PR Review Comment: https://git.openjdk.org/jdk/pull/24385#discussion_r2030644340