RFR: 8351666: [PPC64] Make non-volatile VectorRegisters available for C2 register allocation [v4]

[Martin Doerr]

On Wed, 9 Apr 2025 14:49:55 GMT, Richard Reingruber <rrich at openjdk.org> wrote:

>> Ah, I see: it depends on Op_VecX. Op_VecX has 4 slots: https://github.com/openjdk/jdk/blob/7aeaa3c21c1420191fe8ff59e4cf99eae830754d/src/hotspot/share/opto/regmask.hpp#L90-L110
>> 
>> Hm, is it really necessary to model the vector registers as 4 32-bit parts? As you said offline this makes the `RegisterMasks` larger. If so then shouldn't Op_VecS be used?
>
> Also: why is it even necessary to define VSR0 - VSR31 if we don't use them (because they are aliases of the FP regs)? I assume they unnecessaryly enlarge RegMasks and the size of RegMasks is critical for memory consumtion.

I've removed them. This makes sense. Thanks for your feedback! I'll take a closer look at the other comments when I find more time.

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PR Review Comment: https://git.openjdk.org/jdk/pull/23987#discussion_r2036198671