RFR: 8351666: [PPC64] Make non-volatile VectorRegisters available for C2 register allocation [v17]

[Martin Doerr]

> This PR makes the non-volatile VectorRegisters available for C2's register allocation.
> 
> I had to implement the VectorRegisters properly (4 VM Regs) like on other platforms. The old version has run into assertions and looked strange.
> 
> The non-volatile VectorRegisters are now saved when entering Java: call_stub and upcall_stubs.
> I have rewritten the save and restore functions and used them for both. Then, I have removed code which has become dead. I only save and restore them if C2 uses the vector instructions (controlled by `SuperwordUseVSX`).
> I have moved the non-volatile spill area out of the entry_frame_locals because it has a variable size, now.
> 
> The stack area for all non-volatile registers has become larger than the 288 Bytes which are allowed to be used below the SP (specified by the ABI). Therefore, I had to rewrite the call_stub sequence significantly. We need to push the new frame before saving the registers, now.
> 
> Saving and restoring the FP registers is not needed in the slow signature handler which also uses the save and restore code for non-volatile registers.
> 
> On Power10, we use vector pair instructions since Commit 8. E.g. in the call stub:
> 
>   0x000072c9483c07b4:   stxvp   vs52,-224(r2)
>   0x000072c9483c07b8:   stxvp   vs54,-192(r2)
>   0x000072c9483c07bc:   stxvp   vs56,-160(r2)
>   0x000072c9483c07c0:   stxvp   vs58,-128(r2)
>   0x000072c9483c07c4:   stxvp   vs60,-96(r2)
>   0x000072c9483c07c8:   stxvp   vs62,-64(r2)
> 
> 
> 
>   0x000072c9483c0914:   lxvp    vs52,-224(r2)
>   0x000072c9483c0918:   lxvp    vs54,-192(r2)
>   0x000072c9483c091c:   lxvp    vs56,-160(r2)
>   0x000072c9483c0920:   lxvp    vs58,-128(r2)
>   0x000072c9483c0924:   lxvp    vs60,-96(r2)
>   0x000072c9483c0928:   lxvp    vs62,-64(r2)

Martin Doerr has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains 26 additional commits since the last revision:

 - Merge remote-tracking branch 'origin' into 8351666_PPC64_nv_VRs
 - C1: Avoid set_callee_saved for high halves like in sharedRuntime RegisterSaver.
 - Fix regName for VSR VMRegs.
 - Support displacement for new load/storeV16_Power9 nodes.
 - Fix OopMap for Power10 Little Endian.
 - Use consistent vector element ordering and simplify OopMap code.
 - Handle alignment.
 - Change VSR reg_defs to Op_RegF.
 - Improve VMReg handling.
 - Handle alignment.
 - ... and 16 more: https://git.openjdk.org/jdk/compare/d91be5c8...5168c5b8

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/23987/files
  - new: https://git.openjdk.org/jdk/pull/23987/files/c8e09e08..5168c5b8

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=23987&range=16
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=23987&range=15-16

  Stats: 239671 lines in 1271 files changed: 48487 ins; 186400 del; 4784 mod
  Patch: https://git.openjdk.org/jdk/pull/23987.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/23987/head:pull/23987

PR: https://git.openjdk.org/jdk/pull/23987