RFR: 8362504: AArch64: Replace MOVZ+MOVK+MOVK with ADRP+ADD [v2]
Andrew Haley
aph at openjdk.org
Tue Aug 19 13:17:41 UTC 2025
On Tue, 19 Aug 2025 10:44:12 GMT, Fei Gao <fgao at openjdk.org> wrote:
>> If the relocation or target address is guaranteed to reside within the CodeCache, we can safely replace a `movz + movk + movk` sequence with a more compact and efficient `adrp + add` instruction pair.
>>
>> In `MacroAssembler::mov(Register r, Address dest)`, this replacement can be applied if any of the following rules hold:
>>
>> 1. The relocation type indicates that the address resides within the CodeCache and the necessary patching logic is provided in `fix_relocation_after_move()`.
>> 2. The target address is fixed (i.e., does not require relocation) and is within the reachable range for `adrp`.
>>
>> The patch performs the filtering in `is_relocated_within_codecache()` and `is_adrp_reachable()` to ensure this optimization is applied safely and selectively.
>
> Fei Gao has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains three additional commits since the last revision:
>
> - Disable reachability-based optimization during AOT code dumping
> - Merge branch 'master' into replace-mov-with-adrp
> - 8362504: AArch64: Replace MOVZ+MOVK+MOVK with ADRP+ADD
>
> If the relocation or target address is guaranteed to reside within
> the CodeCache, we can safely replace a `movz + movk + movk`
> sequence with a more compact and efficient `adrp + add`
> instruction pair.
>
> In `MacroAssembler::mov(Register r, Address dest)`, this
> replacement can be applied if any of the following rules hold:
>
> 1. The relocation type indicates that the address resides within
> the CodeCache and the necessary patching logic is provided in
> `fix_relocation_after_move()`.
> 2. The target address is fixed (i.e., does not require relocation)
> and is within the reachable range for `adrp`.
>
> The patch performs the filtering in `is_relocated_within_codecache()`
> and `is_adrp_reachable()` to ensure this optimization is applied
> safely and selectively.
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 2272:
> 2270:
> 2271: #ifdef ASSERT
> 2272: bool MacroAssembler::unqualified_type(relocInfo::relocType rtype) {
Suggestion:
bool MacroAssembler::is_unqualified_type(relocInfo::relocType rtype) {
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 2302:
> 2300: add(r, r, offset);
> 2301: } else {
> 2302: #ifdef ASSERT
You don't need this
#ifdef ASSERT
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 5799:
> 5797: }
> 5798:
> 5799: bool MacroAssembler::is_adrp_reachable(const address target) {
assert here that code cache is 4k-aligned.
-------------
PR Review Comment: https://git.openjdk.org/jdk/pull/26653#discussion_r2285243434
PR Review Comment: https://git.openjdk.org/jdk/pull/26653#discussion_r2285230901
PR Review Comment: https://git.openjdk.org/jdk/pull/26653#discussion_r2285238274
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