RFR: 8373069: RISC-V: implement GHASH intrinsic [v3]

[Anjian Wen]

On Wed, 10 Dec 2025 16:09:09 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Anjian Wen has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   modify some format and change name
>
> src/hotspot/cpu/riscv/assembler_riscv.hpp line 1989:
> 
>> 1987: 
>> 1988:   // Vector GHASH (Zvkg) Extension
>> 1989:   INSN(vgmul_vv, 0b1110111, 0b010, 0b10001, 0b1, 0b101000);
> 
> Seems not used anywhere?

yes, I don't use it in this patch, it is one of the zvkg ins, maybe we can enable it later when we need it and I have move it.

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 2857:
> 
>> 2855:     VectorRegister partial_hash = v29;
>> 2856:     VectorRegister hash_subkey = v30;
>> 2857:     VectorRegister cipher_text = v31;
> 
> Can we simply start from `v1` here?

sure, we can use v1 here, done

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 7109:
> 
>> 7107:     }
>> 7108: 
>> 7109:     if (UseGHASHIntrinsics && UseZvbb) {
> 
> Do we need to re-check `UseZvbb` here? `UseGHASHIntrinsics` will be disabled if we don't have `UseZvbb`.

yes, fixed it

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PR Review Comment: https://git.openjdk.org/jdk/pull/28548#discussion_r2608913077
PR Review Comment: https://git.openjdk.org/jdk/pull/28548#discussion_r2608909648
PR Review Comment: https://git.openjdk.org/jdk/pull/28548#discussion_r2608910567