RFR: 8345125: Aarch64: Add aarch64 backend for Float16 scalar operations

[Bhavana Kilambi]

On Mon, 24 Feb 2025 17:28:43 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> This patch adds aarch64 backend for scalar FP16 operations namely - add, subtract, multiply, divide, fma, sqrt, min and max.
>
> src/hotspot/cpu/aarch64/aarch64.ad line 6978:
> 
>> 6976: // ldr instruction has 32/64/128 bit variants but not a 16-bit variant. This
>> 6977: // loads the 16-bit value from constant pool into a 32-bit register but only
>> 6978: // the bottom half will be populated.
> 
> Surely what actually happens here is that it loads a 32-bit word from the constant pool. The bottom 16 bits of this word contain the half-precision constant, the top 16 bits are zero.

I agree. The wording didn't quite convey that. I will change it in my next PS. Thank you for looking into the patch!

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PR Review Comment: https://git.openjdk.org/jdk/pull/23748#discussion_r1968120239