RFR: 8347352: RISC-V: Cleanup bitwise AND assembler routines

Fei Yang fyang at openjdk.org
Thu Jan 9 15:03:53 UTC 2025


Hi, Please consider this small refactoring work.

It's a bit strange that we have `Assembler::_and_imm12` and `MacroAssembler::andi`, which is quite different from friends `Assembler::ori` and `Assembler::xori`. And it doesn't seem necessary to have this `MacroAssembler::andi` which checks the immediate range as I find it is within 12-bit range for most of the cases. One exception is in file `sharedRuntime_riscv.cpp` where we can do `mv` and `andr` instead.

Testing on Premier P550 SBC:
- [x] tier1-3 and gtest:all (release)
- [x] hotspot:tier1 (fastdebug)

-------------

Commit messages:
 - 8347352: RISC-V: Cleanup bitwise AND assembler routines

Changes: https://git.openjdk.org/jdk/pull/23008/files
  Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=23008&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8347352
  Stats: 34 lines in 5 files changed: 1 ins; 10 del; 23 mod
  Patch: https://git.openjdk.org/jdk/pull/23008.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/23008/head:pull/23008

PR: https://git.openjdk.org/jdk/pull/23008


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