RFR: 8347352: RISC-V: Cleanup bitwise AND assembler routines [v2]

[Fei Yang]

> Hi, Please consider this small refactoring work.
> 
> It's a bit strange that we have `Assembler::_and_imm12` and `MacroAssembler::andi`, which is quite different from friends `Assembler::ori` and `Assembler::xori`. And it doesn't seem necessary to have this `MacroAssembler::andi` which checks the immediate range. I find the immediate is within signed 12-bit range for most of the cases. One exception is in file `sharedRuntime_riscv.cpp` where I think we can do `mv` + `andr` instead.
> 
> Testing on linux-riscv64:
> - [x] tier1-3 and gtest:all (release)
> - [x] hotspot:tier1 (fastdebug)

Fei Yang has updated the pull request incrementally with one additional commit since the last revision:

  Improve

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/23008/files
  - new: https://git.openjdk.org/jdk/pull/23008/files/5c45a475..47adf1fc

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=23008&range=01
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=23008&range=00-01

  Stats: 6 lines in 1 file changed: 0 ins; 0 del; 6 mod
  Patch: https://git.openjdk.org/jdk/pull/23008.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/23008/head:pull/23008

PR: https://git.openjdk.org/jdk/pull/23008