Integrated: 8347352: RISC-V: Cleanup bitwise AND assembler routines

[Fei Yang]

On Thu, 9 Jan 2025 14:38:46 GMT, Fei Yang <fyang at openjdk.org> wrote:

> Hi, Please consider this small refactoring work.
> 
> It's a bit strange that we have `Assembler::_and_imm12` and `MacroAssembler::andi`, which is quite different from friends `Assembler::ori` and `Assembler::xori`. And it doesn't seem necessary to have this `MacroAssembler::andi` which checks the immediate range. I find the immediate is within signed 12-bit range for most of the cases. One exception is in file `sharedRuntime_riscv.cpp` where I think we can do `mv` + `andr` instead.
> 
> Testing on linux-riscv64:
> - [x] tier1-3 and gtest:all (release)
> - [x] hotspot:tier1 (fastdebug)

This pull request has now been integrated.

Changeset: 4f3dc9d1
Author:    Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/4f3dc9d13a609ef50205f77e9cdf9c57fd30bcca
Stats:     42 lines in 5 files changed: 1 ins; 10 del; 31 mod

8347352: RISC-V: Cleanup bitwise AND assembler routines

Reviewed-by: rehn, fjiang, mli

-------------

PR: https://git.openjdk.org/jdk/pull/23008