RFR: 8360000: RISC-V: implement aot [v2]

[Andrew Dinn]

On Fri, 4 Jul 2025 13:45:22 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 766:
>> 
>>> 764:   BLOCK_COMMENT(str);
>>> 765:   illegal_instruction(Assembler::csr::time);
>>> 766:   emit_int64((uintptr_t)str);
>> 
>> I noticed that our aarch64 counterpart puts the address of msg into `r0` in https://github.com/openjdk/jdk/pull/24740.
>> 
>>   // load msg into r0 so we can access it from the signal handler
>>   // ExternalAddress enables saving and restoring via the code cache
>>   lea(c_rarg0, ExternalAddress((address) str));
>> 
>> 
>> And fetches the address from `r0` in `PosixSignals::pd_hotspot_signal_handler`:
>> 
>>         // A pointer to the message will have been placed in `r0`
>>         const char *detail_msg = (const char *)(uc->uc_mcontext.regs[0]);
>> 
>> 
>> I am not sure but I guess this is needed for the correct working of aot? Maybe we should do similar things.
>
> My test shows that it's fine to keep the current way to pass the stop message to sig handler, in both dump and use time. Seems currently both ways work.
> But to keep the consistency with other platforms, I'll change it too.

You do need to make this change consistent with how it was done for AArch64. The old compiler code embedded the address of the string into the instruction stream immediately after illegal instruction without a relocation. The signal handler used the faulting PC as a way to identify the location of the pointer. That won't work if the code gets saved and loaded as the string may not be at the same address. The new code marks the lea instruction as relocatable and adds the string address to the AOT external constants table. This allows the target of the lea to be relocated when the code is reloaded from the AOT cache.

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PR Review Comment: https://git.openjdk.org/jdk/pull/26101#discussion_r2189746675